Register  /  Login               
Print this article

Wafer Flatness After Wax Bonding In Vacuun Chamber

*Corresponding author
1. Department of Mechanical Engineering, Nanya Institute of Technology NO.414,Sec.3, Jhongshan E. Rd., Jhongli City,
Taoyuan, 32091 Taiwan (R.O.C.)


Along with the design of semiconductor elements getting light, thin, and small, wafer thinning is gradually emphasized. Flatness is a primary control item in the wafer thinning process. Improper process control might result in non-uniformed wafer thickness and force to results in damage or breaking wafer. In this study, Taguchi quality control is used for analyzing wafer flatness with wax bonding in a vacuum chamber.


(1) Referring to 2017 Semiconductor Industry Yearbook, communications markets show the highest requirement for IC (integrated circuit) products.

(2) From the 3D section of IC, the bottom dark blue is wafer. From the figure, wafer plays the role in IC as the foundation of a house to support the entire structure. An integrated circuit needs so many layers because there are too many circuits connected. All circuits could not be accommodated in a single layer that several layers are required for achieving the goal. Circuits in different layers would be connected to satisfy the connection need. Such a method could reduce the area for connecting circuits. For this reason, thinner chips cannot be used for maintaining wafers not being deformed in the several hundreds of process; merely chips with certain thickness are delivered and processed in the process. It needs to overcome several difficulties to integrate integrated circuits (IC) with different functions in system-on-a-chip (SoC) or system-level integration (SLI); or, it could change the method to directly package them in an integrated circuit (IC). Directly packaging chips with different f ...

About us

Teknoscienze publisher
& Event Organizer

Viale Brianza, 22
20127 - Milano - Italy
Tel. +39 02 26809375